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1993-09-21
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# PCB parameters
Layer Thickness: 304800
Copper Thickness: 38100
Relative Dielectric Constant: 3.800000
Layer Attribute (SIG,PLN)
1 SIG
2 PLN
3 PLN
4 SIG
# EDC Setup options
Apply rules for checking Length and Delay to
(Net,Connection,Segment): Net
Apply rules for checking Parallelism to
(Net,Segment): Net
Detail for Capacitance and Delay information
(Net,Connection,Segment): Segment
Detail for Parallelism information
(Net,Segment,None): Net
Detail for Daisy Chain information
(Stub,Connection,Segment,None): Stub
Include copper areas capacitance (Yes,No ): Yes
Perform Tandem track check (Yes,No ): Yes
Output segment coordinates (On ,Off): On
Filter
(Violations Only,All Items): All Items
Track separation for Parallelism check: 7620000
# EDC Task List
<Net:* Class name: ALL
Mask:On LEN:On DLY:On CAP:On IMP:On PRL:On STB:On LUP:On
<Net:24MHZ Class name: ALL
Mask:Off LEN:On DLY:Off CAP:Off IMP:Off PRL:Off STB:On LUP:On
# Checking Rules list
<Class:*
Min. and max. Length: 0.000000 55245000.000000
Min. and max. Delay (psec): 0.000000 10000.000000
Min. and max. Capacitance (pF): 0.000000 20.000000
Aggressor (Yes,No ): Yes
Max. Parallelism Overlap: 3810000.000000
Min. and max. Impedance (Ohm): 0.000000 100.000000
Maximal Stub: 381000.000000
# End of EDC parameters file